The University of Twente (UT) once again holds the world record for energy-efficient analog to digital conversion (ADC). Utilizing UT researcher Harijot Singh Bindra’s modifications to the actual conversion of analog to digital, as well as his tweaks to the preceding input signal preparation, the new chip design lowered energy consumption to less than one picojoule per conversion step – lower than the current standard.
Bindra’s ADC design is of the “successive approximation” type. This is already considered the most energy-efficient choice for AD conversion. In this type of ADC, the input signal is compared to a changing reference voltage, thus step-by-step moving towards the accurate digital code that represents the physical signal. This comparison alone accounts for more than half the total energy consumption of the converter. Each comparison step takes a minimum amount of energy for a certain accuracy level. Then, this energy is lost at the end of each comparison and has to be replenished for the next comparison step. Energy loss depends on the voltage difference after a comparison step, and on the capacitance value. By making smart adjustments to both, Bindra manages to lower the comparator energy consumption by a factor 2.5.
Furthermore, to enable AD conversion, the signal coming from the sensor must first be ‘made ready’ at the inputs of an ADC. In most cases, a relatively large capacitor is to be charged to the entire signal range for that. By clever switching between capacitors, depending on the level of the input signal, the energy required to ‘feed’ the physical (sensed) signal to the ADC inputs for conversion can be reduced by two to three times.
Bindra obtained his PhD degree cum laude, after defending his thesis “Low-energy design techniques for data converters”. His supervisors were Bram Nauta and Anne-Johan Annema, of UT’s Integrated Circuit Design group.
